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General Summary:

As a Verification Engineer, you will be responsible for understanding the expected functionality of multimedia designs, specifically video encoder/decoder and hardware IP and subsystem. You will work with the architects of these multimedia systems, as well as multimedia ASIC designers and SW engineers to plan and execute verification and validation of multimedia subsystems for integration into So Cs for mobile applications.

Preferred Qualifications

· Test planning, creating environment, problem solving, debug, verification of multimedia hardware, and strong working knowledge of HVLs

· Advanced knowledge of System Verilog and UVM methodology.

· Strong working experience in coverage driven constraint random verification.

· Strong debugging, analytical and problem-solving skills.

. Experience in scripting language like Tcl/Perl/Python/Shell-scripting is plus.

· Experience in formal verification is plus

· Experience in building simulation acceleration environment is plus

· Prior experience in multimedia HW accelerator verification of Video Codec & Video codec knowledge H.264/MPEG/HEVC/VPx/AV1/VVC

Minimum Qualifications:

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