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Sr. Application Engineer - High Level Synthesis, Seongnam-si

게시됨 2024-05-15
만료 2024-05-16
ID #2154997171
Free
Sr. Application Engineer - High Level Synthesis, Seongnam-si
Korea South, 경기도, 성남시,
게시됨 May 15, 2024

설명

At Siemens, we are always challenging ourselves to build a better future.

We are an equal opportunity employer and value diversity at our company. We do not discriminate based on race, religion, color, national origin, sex, gender, gender expression, sexual orientation, age, marital status, veteran status, or disability status.

Siemens EDA is a global technology leader in Electronic Design Automation software. Our software tools enable companies around the world to develop highly innovative electronic products faster and more cost-effectively.

Our customers use our tools to push the boundaries of technology and physics to deliver better products in the increasingly complex world of chip, board, and system design.

Key Responsibilities Work with the World Trade Sales Organization to drive pre and post-sales technical activities to sell and support High-Level Synthesis (HLS) Electronic Design Automation (EDA) tools Territory coverage includes primarily customers in Korea Be responsible for integrating with a broader team and communicating essential status to a variety of stakeholders located in other parts of the world Analyze customer designs leveraging HLS technology and knowledge to produce better design results and enable customer success Assist with customer design and verification Provide customer training on High-Level Synthesis Products Perform Beta testing and collaborate with R&D to drive product direction and capabilities of HLS, RTL power optimization, and Formal Verification Will require up to 5% of total travel within Korea or other locations in the world for support and training purposes Qualifications BS EE/CS 5+ years of design or application engineering experience Knowledge of VHDL or Verilog, or System Verilog RTL languages for ASIC or FPGA design Experience with RTL Power tools and methodology or ASIC hardware design/implementation either RTL or HLS tool flow Experience with RTL verification flows and methodologies Knowledge of C/C++ or RTL digital logic design practice for verification and synthesis Knowledge of Power analysis or Digital Signal Processing would be an added advantage Ability to work independently with minimal supervision Excellent written and verbal communication in English are essential#LI-EDA#LI-Hybrid

작업 세부 정보:

직업 종류: 풀 타임
계약 유형: 영구적인
급여 유형: 월간 간행물
직업: Sr. application engineer - high level synthesis

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